1. Field of the Invention
This invention relates to digital camera technology and more particularly to a digital camera having reduced power consumption.
Interleaving or ping-pong processing of digital color signals in an analog to digital converter is a known technique for processing signals through switched capacitor circuits. In interleaved processing, there is an inherent mismatch between the passive components used in the two phases, the xe2x80x9cpingxe2x80x9d path and the xe2x80x9cpongxe2x80x9d path. The difference or mismatch in gain and offset creates fixed pattern noise which in a video signal would be manifest as a spatial frequency tone. Thus ping-pong processing has never been known to be used in programmable gain amplification for video signal processing.
It is helpful to understand the structure of a class of single chip CCD video sensors, such as that which incorporates the Bayer pattern. RGB pixels are arranged in a distinctive pattern so that a progressive scan through two adjacent lines produces all of the red, green and blue values. The Bayer pixel pattern looks like the following, noting the adjacent RGB pixel group:
A. R G R G R G R G R G R G R G R G R G
B. G B G B G B G B G B G B G B G B G B
In the prior art, all color video signals were passed through a single analog channel or path without switching, treating R, G and B identically with the same gain, to produce alternating colors sliced by time. There was a problem with lack of gain control over the separate color components. In order to provide for separate control of gain on each component, it would be necessary to provide separate signal paths, including separate amplifiers in each path.
2. Description of the Prior Art
CCD signal processors for electronic cameras are known, as evidenced by devices such as Analog Devices part AD9802 as described in its Specification Sheet dated at least as early as 1997. FIG. 19 thereof, reproduced herein as FIG. 1 (Prior Art), 5 illustrates a single path processor employing independent amplifiers 12, 14 feeding a single programmable gain amplifier (PGA) 15 as controlled by a controller 19. Because of the inherent mismatch, two different PGAs 16, 18 are used in alternate feedback paths.
While two input paths are shown, there is nothing which conceptually requires two feedback paths except correction of the inherent mismatch.
Switched capacitor gain stages coupled in parallel signal paths have been used in parallel pipelined analog to digital converters are known, as for example described in W. Bright, xe2x80x9c8b 75MSample/s 70mW Parallel Pipelined ADC Incorporating Double Sampling,xe2x80x9d ISSCC98, Feb. 6, 1998, (IEEE 0-7803-4344-1/98) p. 146. The switched capacitors are used during non-overlapping alternate clock phases. Due to natural fabrication limitations in integrated circuits, the accuracy of the foregoing design is limited to about 8 bits. Any gain and offset mismatch, as a result of inherent passive component mismatches in the two paths, introduces an undesirable noise pattern, manifest as noise or a tone.
In conventional CMOS technology, switched capacitor gain stages are implemented by switching among capacitors in a synchronized non-overlapping phase pattern to produce a desired output. The switched capacitor topology is common to various building blocks in a correlated double sample element (CDS), a programmable gain amplifier (PGA) and pipeline analog to digital converter (ADC), which are coupled in series in prior art configurations. However, in integrated circuits, natural fabrication mismatches between the ratio of capacitors limits the accuracy of the gain to be no more than about 8 to 9 bits. Any such gain mismatch between the even and the odd samples introduces an undesired tone or spurious modulation in the signal path equivalent to a fixed pattern noise. Parallel path switched capacitor circuits can share a common amplifier. While the architecture provides much lower power dissipation, the spurious artifacts make this circuit unusable in certain desired applications where noise or spatial frequency tones are intolerable.
According to the invention, for use in a low-power digital imaging devices, for example a low-power single CCD-based digital camera, particularly in a battery-operated camera, a method for implementing video signal processing is provided wherein a single amplifier is employed in switched but parallel and uncorrelated signal paths in a manner which avoids fixed pattern noise that would be introduced by mismatches in gain and offset in various paths. The desired effect is achieved through use of a controller that switches appropriate sets of capacitors in parallel paths to establish different gains for each pixel component. The invention achieves power savings and flexibility to independently control the gain of each color component.
The invention will be better understood upon reference to the following detailed description in conjunction with the accompanying drawings.